1. Field of the Invention
The present invention relates to semiconductor devices and, in particular, to a semiconductor device containing a high-speed non-volatile memory which stores information in memory cells using phase change resistors.
2. Description of the Related Art
Aimed at a high-speed and highly integrated non-volatile memory, the development of phase change memories is now in progress as described in “2002 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 202–203”. In the phase change memory, information is stored by utilizing a phase change material called a chalcogenide material which changes its resistivity depending on the state. Write operations to a phase change resistor are done by supplying a current thereto so that the resistor is heated to change the state. Lowering the resistivity, called a set operation, is done by keeping the resistor at relatively low temperature for enough long time, whereas raising the resistivity, called a reset operation, is done by heating it to relatively high temperature. In addition, a read operation from the phase change material is done by applying such a magnitude of current as not to change the state of the phase change resistor.
In “2002 IEEE International Electron Device Meetings, Technical Digest, pp. 923–926”, characteristics of phase change resistors are described. In “2003 Non-Volatile Semiconductor Memory Workshop, Digest of Technical Papers, pp. 91–92), a memory cell composed of a phase change resistor and a NMOS transistor is described.
These documents discuss the potentialities of the phase change memory not only as high-speed ROM (Read-Only Memory) but also as non-volatile RAM (Random Access Memory) which can be the unified memory having both ROM and RAM functions. FeRAM (Ferroelectric RAM) and MRAM (Magnetic RAM) are also under development as other high-speed non-volatile memories. However, it is difficult to reduce the area of the ferroelectric capacitor in FeRAM and therefore the area of the cell. MRAM has also a drawback that high-speed read is difficult since the magnitude of the readout signal is small due to the small change ratio of the magnetoresistance. On the other hand, the phase change memory allows easy scaling since reducing the electrode area of the phase change resistor decreases the power required to change the phase of the phase change resistor. In addition, since the resistance of the phase change resistor changes widely as compared with the magnetoresistance in MRAM, high-speed read operation can be realized. Due to these reasons, phase change resistor-used high speed non-volatile memory is expected to be implemented.
To use the phase change memory as a RAM, write time matters. To lower the resistivity of a phase change resistor, it is necessary to let current flow through the phase for an enough long period, for example, about 20 ns. In addition, after the resistivity is raised, it is necessary to wait for enough time, for example 20 ns, before a read operation is done from that memory cell so that the state of the phase change resistor settles.
To introduce a phase change memory as a non-volatile RAM chip, it is preferable to make the phase change memory compatible in specification with a low power RAM chip so as to minimize the system change. Recently, low power SRAM (Static RAM) chips are widely used as low power RAM chips. Merely replacing the internal memory array of a SRAM chip by a phase change memory array cannot conform to the operational specifications expected for ordinary SRAM chips. After the resistivity-lowering write operation is done, a sufficient amount of write time is required to access the same memory cell. After the resistivity-raising write operation is done, a large amount of time is also required to settle the state of the phase change resistor before the subsequent read access is done to the same memory cell. That is, it is difficult to raise the access speed to the level of low power SRAM chips.